1/8 preliminary data june 2003 STD7NS20 STD7NS20-1 n-channel 200v - 0.35 w - 7a dpak / ipak mesh overlay? mosfet n typical r ds (on) = 0.35 w n extremely high dv/dt capability n 100% avalanche tested n very low intrinsic capacitances n add suffix t4 for ordering in tape & reel description using the latest high voltage mesh overlay? process, stmicroelectronics has designed an ad- vanced family of power mosfets with outstanding performance. the new patented strip layout cou- pled with the companys proprietary edge termina- tion structure, makes it suitable in coverters for lighting applications. applications n high current, high speed switching n swith mode power supplies (smps) n dc-dc converters for telecom, industrial, and lighting equipment absolute maximum ratings (?)pulse width limited by safe operating area type v dss r ds(on) i d STD7NS20 STD7NS20-1 200 v 200 v < 0.40 w < 0.40 w 7a 7a symbol parameter value unit v ds drain-source voltage (v gs =0) 200 v v dgr drain-gate voltage (r gs =20k w ) 200 v v gs gate- source voltage 20 v i d drain current (continuos) at t c = 25c 7a i d drain current (continuos) at t c = 100c 4.4 a i dm ( ) drain current (pulsed) 28 a p tot total dissipation at t c = 25c 45 w derating factor 0.37 w/c dv/dt (1) peak diode recovery voltage slope 5 v/ns t stg storage temperature C65 to 150 c t j max. operating junction temperature 150 c (1) i sd 7a, di/dt 300 a/ m s, v dd v (br)dss ,tj t jmax internal schematic diagram 1 3 to-252 dpak 3 2 1 ipak to-251
STD7NS20 / STD7NS20-1 2/8 thermal data avalanche characteristics electrical characteristics (tcase = 25 c unless otherwise specified) off on (1) dynamic rthj-case thermal resistance junction-case max 2.7 c/w rthj-amb thermal resistance junction-ambient max 100 c/w t l maximum lead temperature for soldering purpose 275 c symbol parameter max value unit i ar avalanche current, repetitive or not-repetitive (pulse width limited by t j max) 7a e as single pulse avalanche energy (starting t j = 25 c, i d =i ar ,v dd =50v) 60 mj symbol parameter test conditions min. typ. max. unit v (br)dss drain-source breakdown voltage i d = 250 a, v gs = 0 200 v i dss zero gate voltage drain current (v gs =0) v ds = max rating 1a v ds = max rating, t c = 125 c 10 a i gss gate-body leakage current (v ds =0) v gs = 20v 100 na symbol parameter test conditions min. typ. max. unit v gs(th) gate threshold voltage v ds =v gs ,i d = 250a 234v r ds(on) static drain-source on resistance v gs =10v,i d = 3.5 a 0.35 0.40 w symbol parameter test conditions min. typ. max. unit g fs (1) forward transconductance v ds >i d(on) xr ds(on)max, i d = 3.5 a 4s c iss input capacitance v ds =25v,f=1mhz,v gs =0 540 pf c oss output capacitance 90 pf c rss reverse transfer capacitance 35 pf
3/8 STD7NS20 / STD7NS20-1 electrical characteristics (continued) switching on switching off source drain diode note: 1. pulsed: pulse duration = 300 s, duty cycle 1.5 %. 2. pulse width limited by safe operating area. symbol parameter test conditions min. typ. max. unit t d(on) turn-on delay time v dd =100v,i d = 3.5 a r g = 4.7 w v gs =10v (see test circuit, figure 3) 10 ns t r rise time 15 ns q g total gate charge v dd =160v,i d =18a, v gs =10v 31 45 nc q gs gate-source charge 7.5 nc q gd gate-drain charge 9 nc symbol parameter test conditions min. typ. max. unit t r(voff) t f t c off-voltage rise time fall time cross-over time v clamp = 160 v, i d =7a, r g =4.7 w, v gs = 10v (see test circuit, figure 5) 12 12 25 ns ns ns symbol parameter test conditions min. typ. max. unit i sd source-drain current 7 a i sdm (2) source-drain current (pulsed) 28 a v sd (1) forward on voltage i sd = 7 a, v gs =0 1.5 v t rr reverse recovery time i sd = 7 a, di/dt = 100a/s v dd =50v,t j = 150c (see test circuit, figure 5) 170 ns q rr reverse recovery charge 0.95 m c i rrm reverse recovery current 11 a
STD7NS20 / STD7NS20-1 4/8 fig. 5: test circuit for inductive load switching and diode recovery times fig. 4: gate charge test circuit fig. 2: unclamped inductive waveform fig. 1: unclamped inductive load test circuit fig. 3: switching times test circuit for resistive load
5/8 STD7NS20 / STD7NS20-1 dim. mm inch min. typ. max. min. typ. max. a 2.20 2.40 0.087 0.094 a1 0.90 1.10 0.035 0.043 a2 0.03 0.23 0.001 0.009 b 0.64 0.90 0.025 0.035 b2 5.20 5.40 0.204 0.213 c 0.45 0.60 0.018 0.024 c2 0.48 0.60 0.019 0.024 d 6.00 6.20 0.236 0.244 e 6.40 6.60 0.252 0.260 g 4.40 4.60 0.173 0.181 h 9.35 10.10 0.368 0.398 l2 0.8 0.031 l4 0.60 1.00 0.024 0.039 v2 0 o 8 o 0 o 0 o p032p_b to-252 (dpak) mechanical data
STD7NS20 / STD7NS20-1 6/8 dim. mm inch min. typ. max. min. typ. max. a 2.2 2.4 0.086 0.094 a1 0.9 1.1 0.035 0.043 a3 0.7 1.3 0.027 0.051 b 0.64 0.9 0.025 0.031 b2 5.2 5.4 0.204 0.212 b3 0.85 0.033 b5 0.3 0.012 b6 0.95 0.037 c 0.45 0.6 0.017 0.023 c2 0.48 0.6 0.019 0.023 d 6 6.2 0.236 0.244 e 6.4 6.6 0.252 0.260 g 4.4 4.6 0.173 0.181 h 15.9 16.3 0.626 0.641 l 9 9.4 0.354 0.370 l1 0.8 1.2 0.031 0.047 l2 0.8 1 0.031 0.039 a c2 c a3 h a1 d l l2 l1 1 3 = = b3 b b6 b2 e g = = = = b5 2 to-251 (ipak) mechanical data 0068771-e
7/8 STD7NS20 / STD7NS20-1 tape and reel shipment (suffix t4)* tube shipment (no suffix)* dpak footprint * on sales type dim. mm inch min. max. min. max. a 330 12.992 b 1.5 0.059 c 12.8 13.2 0.504 0.520 d 20.2 0.795 g 16.4 18.4 0.645 0.724 n 50 1.968 t 22.4 0.881 base qty bulk qty 2500 2500 reel mechanical data dim. mm inch min. max. min. max. a0 6.8 7 0.267 0.275 b0 10.4 10.6 0.409 0.417 b1 12.1 0.476 d 1.5 1.6 0.059 0.063 d1 1.5 0.059 e 1.65 1.85 0.065 0.073 f 7.4 7.6 0.291 0.299 k0 2.55 2.75 0.100 0.108 p0 3.9 4.1 0.153 0.161 p1 7.9 8.1 0.311 0.319 p2 1.9 2.1 0.075 0.082 r 40 1.574 w 15.7 16.3 0.618 0.641 tape mechanical data all dimensions areinmillimeters all dimensions are in millimeters
STD7NS20 / STD7NS20-1 8/8 information furnished is believed to be accurate and reliable. however, stmicroelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result f rom its use. no license is granted by implication or otherwise under any patent or patent rights of stmicroelectronics. specificati ons mentioned in this publication are subject to change without notice. this publication supersedes and replaces all information previously supplied. stmicroelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of stmicroelectronics. ? the st logo is a registered trademark of stmicroelectronics ? 2003 stmicroelectronics - printed in italy - all rights reserved stmicroelectronics group of companies australia - brazil - canada - china - finland - france - germany - hong kong - india - israel - italy - japan - malaysia - malt a - morocco singapore - spain - sweden - switzerland - united kingdom - united states. ? http://www.st.com
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